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This standard is constructed as a superset of 1149.1 boundary scan, adding two additional analog test pins to the definition. The goal of the standard is to support opens and shorts testing of mixed-signal boards and to provide the capability of making analog value measurements of discrete analog components such as resistors, inductors, and capacitors without direct nodal accessibility, that is, a full bed of nails. (See Fig. 54.7.) It has been likened to in-circuit testing without a bed of nails, which is again not without caveats. (The elimination of test access points will still have to be done with thoughtful deliberation.)

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FIGURE 54.7 A mixed-signal circuit with some possible defects. IC pins marked A and D are analog and digital, respectively.

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A mixed-signal device constructed with 11494 has the general architecture shown in Fig 548 It is in many ways identical to an 11491 IC, but it has an additional analog test access port (ATAP) that is used to facilitate the control and observability of analog signals at device pins The ATAP brings into the IC two additional analog signals that are used during testing With 11494, digital device pins are treated exactly as done with an 11491 boundary register Analog pins have an augmented structure called an analog boundary module (ABM) as part of the boundary register The ABM allows an analog pin to be tested for simple shorts and opens (this is called 11491 interconnect test emulation) as well as allowing the injection and/or observation of analog signals via the ATAP An ATE system can utilize the test resources in an 1149.

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4 IC as shown in Fig 549 This requires the coordination of a digital test sequencer with analog test resources in this case, a current source and voltmeter Pathways from these resources and through the 11494 IC can be used to make measurements on discrete analog components on a board, even with no bedof-nails access to the components The pathways needed for a measurement are provided by silicon switches in the ABM Because switches implemented this way have significant nonlinearity and nonnegligible impedances, these must be accounted for in the measurement processes Figure 5410 shows how an analog device can be tested with two measurements First, the tester s current source is connected such that current can flow along AT1 into the IC There it flows on the AB1 bus inside to the ABM connected to pin 1 of the IC.

The current flows through Z and then into pin 2 of the IC Pin 2 s ABM directs the current to ground, completing the current path In Fig 5410(a), the ATE system s voltmeter is connected via the path AT2-AB2 to the ABM on pin 1, where it can observe the voltage at the top of Z In Fig 5410(b), the voltmeter is switched to measure the voltage at pin 2, the bottom of Z Subtracting the two voltage measurements gives the voltage drop across Z for a known current Ohm s law gives us the value of Z, which we can check for the right value This process works even with suboptimal silicon switches.

(11.22)

because we are using a current source to provide the known current and because the voltmeter pathway consumes a vanishingly small current and thus does not affect the accuracy of the measurement. In the future, with these and other standards, test engineers may be able to do complex tests on superdense circuitry with far less nodal access than they were afforded in the past. This will be an enabling technology because without it the electronics industry may find it uneconomical to produce superdense designs except in very high-end applications.

FIGURE 54.10 Two measurements (a) and (b) can be used to measure the voltage across Z for a known current.